www.siliconstandard.com 1 of 10 SS4003 2/01/2005 rev.1.01 smart battery power management features single-chip battery charger controller and gas gauge. provides cell balance control output for charge control. drives 5-segment led display for remaining capacity indication. user-selectable charge-control dat a sets. output for charging indicator maximum voltage charge control for individual cells. provides secondary cell protection functions . applications portable dvd player and computers. 2-cell battery packs or backup devices. package outline 24 pin sop or ssop package. general description the SS4003 charger and gas gauge combo ic for battery pack or in - system installation provides an accurate char ge control and maintains an accurate record of available charge in rechargeable batteries. the SS4003 is dedicated for li-ion chemistries, and monitors capacity and other critical parameters. the SS4003 uses an a-to-d converter for voltage and current measurement. the cumulative charge into (or discharge from) the battery is continuously calculated. the on -chip adc also monitors individual cell voltage in the battery pack and allows the SS4003 to generate charge control signals to charge the pack safely. the SS4003 provides outputs to drive leds to depict remaining battery capacity from full to empty with a 5 - segment display. the SS4003 uses the pre - defined self - discharge rate and other compensation factors stored in the rom to accurately adjust remaining capacity for use and standby conditions based on time. the SS4003 also automatically calibrates or learns the true battery capacity in the course of a discharge cycle from near full to near empty level.
www.siliconstandard.com 2 of 10 SS4003 2/01/2005 rev.1.01 pin configuration ss 4003 1 2 4 3 5 6 7 8 9 11 10 12 24 23 21 22 20 19 18 17 16 14 15 13 led3 led2 pdc batt_low cled cfled led1 i v2 v1 vss adj1 led4 led5 extpwr dispsel s2 s1 osc2 osc1 vdd res cctl adj2
www.siliconstandard.com 3 of 10 ss 4003 2/01/2005 rev.1.01 pin definition pin name pin no i/o description led3 1 output remain capacity display led3 led2 2 output remain capacity display led2 pdc 3 output power down control output (high enable) ba tt_low 4 output secondary battery pack protection control output cled 5 output charge state indicator cfled 6 output charge full state indicator led1 7 output remain capacity display led1 (lsb) i 8 input (a)* 1 current sense input: 2.5v @ 0ma, 0.5v/a v2 9 input (a)* high potential ce ll voltage input v1 10 input (a)* low potential cell voltage input vss 11 input power ground adj1 12 output low potential cell balanced control output adj2 13 output high potential cell balanced control output cctl 14 output charge control output (p wm) res 15 input reset input point vdd 16 input power supply osc1 17 input oscillator input 1 osc2 18 output oscillator output s1 19 input rom data set select input 1 s2 20 input rom data set select input 2 dispsel 21 input battery remain capacity d isplay control (falling edge trig) extpwr 22 input external power plug in input (low true) led5 23 output remain capacity display led5 (msb) led4 24 output remain capacity display led4 * input (a): analog a/d input * note 1: - 0.5v/a, for charge mode and +0.5v/a for discharge mode
www.siliconstandard.com 4 of 10 ss 4003 2/01/2005 rev.1.01 charging indicator the SS4003 provides an output pin to indicate the battery charge status. the cled output shows the battery pack is in charge mode. when the external electric power is plugs in, the cled is on (low) and SS4003 starts to charge. the cled turns off (high) when charge full condition is reached or external power is removed. in case of charge fault condition, the cled will alter the output state (high/low) in every second. the cfled will turn on (low) when the battery is in charge full state during charging period. cfled will turn off (high) in all other conditions. battery remaining-capacity indication the battery remaining-capacity is indicated by 5 led output pins, led1, led2, led3, led4 and led5. low voltages on output pins drive leds on. to reflect the remaining capacity the led outputs are on inclusively from led1 to led5. the more led outputs on the higher the capacity. when all 5 leds are on, the battery capacity reaches above 90% of the full charged capacity. one, two, three and four leds are on when the capacity is above 10%, 25%, 50% and 75% of the full charged capacity, respectively. if the relative state of charge was lower than 10%, the led1 flashes every second. in the charge or discharge state, the leds keep showing the battery capacity. for saving the battery energy, the leds are turned off after about 5 seconds if not in the charge or discharge state. if a negative going signal is applied to dispsel pin and the pack is neither in charge mode nor in discharge mode, the relative state of charge display function will activate. the display function will terminate after 5 seconds if no state change occurred during the period of time. reset the SS4003 is at reset state either first connected to the battery pack or the supply voltage goes below vlvr. on hard reset, the SS4003 initializes and reads the configuration data to configure the battery pack. a suggested reset circuits is illustrated in application circuits 1. sleep mode the SS4003 switches into the sleep mode either no charge flow detected for more than 30 seconds or the relative state of charge is 0%. in the sleep mode, most of logic circuitry in the chip is turned off to minimize the power consumption. SS4003 resumes operation either an external power is plugged in or detects current flow through the sense resistor or display function is activated. measurement operation the SS4003 accumulates charge and discharge current and estimates self-discharge. charge current is controlled according to state-of-charge of the battery. the battery capacity is denoted as remaining capacity (rcap) in terms of relative state of charge, represents the available battery capacity at any given time. charging increases the rcap. discharging and self-discharge will decreases the rcap. an internal register is used to monitor the amount of discharge so as to adjust the full charge capacity (fccap). fccap is updated only if a complete cycle of battery discharge from full to empty level is done and not interleaved by any charge operation. therefore, the SS4003 adapts its capacity determination based on the actual conditions of discharge. the battery's initial full capacity is set to the value stored in a rom. until fccap is updated, rcap counts up to, but not beyond, this threshold during subsequent charge. the battery?s empty state is also programmed in the rom. the battery low percentage stores the percentage of fccap while the battery voltage drops to the pev threshold. 1. full charge capacity (fccap): fccap is the latest measured discharge capacity of the battery. on initialization, fccap is set to the value stored in the rom. during subsequent discharge, fccap is updated with the latest recognized complete discharging (or learning cycle), representing a discharge from full to near empty. a learning cycle is necessary for updating the fccap register. the fccap also serves as the 100% reference threshold used by the relative state-of-charge calculation and display.
www.siliconstandard.com 5 of 10 ss 4003 2/01/2005 rev.1.01 2. design capacity (dcap): the dcap is the user - specified battery capacity and is programmed in the rom. 3. remaining capacity (rcap): rcap counts up to the value of fccap during charge and counts down during discharge and self - discharge. rcap is set to a predefined value if the pack voltage dr ops down to a predefined level. if rcap is equal to the predefined value, rcap keeps until voltage drops below the predefined level. to prevent overstatement of charge during periods of overcharge, rcap stops incrementing when rcap = fccap. 4. cumulated di scharge count (cdc): the cumulated discharge count is used to record the usage of the battery which response to the life of battery. the cdc counts up during discharge independent of rcap and can continue increasing after rcap has decremented to 0. the cdc resets to 0 when cdc = fccap. charge counting charge activity is detected based on a positive voltage on pin i. the voltage input at pin i is measured and converted into current through the sense resistor. if charge activity is detected, the SS4003 incr eases the rcap. charge actions increment the rcap according to the cumulated charge counts. discharge counting discharge activity is detected based on a negative voltage on pin i. the voltage input at pin i is measured and converted into current through t he sense resistor. if discharge activity is detected, the SS4003 decreases the rcap. self - discharge estimation because of the self - discharge, the SS4003 decrements rcap periodically until the charge full or charge empty condition is detected. the estima ted self - discharge rate is programmed in a rom. charge control SS4003 utilizes pwm methodology for charge control. there are three types of charge control, trickle charge, constant current charge, and constant voltage charge. the SS4003 updates the char ging current based on the battery?s voltage. the SS4003 uses current taper detection for li - ion primary charge termination and over voltage detection to suspend charging. the SS4003 also provides a number of safety terminations based on battery capacity, voltage, and conditions of individual cell. the pwm output control range is form 0% to 99%. two types of control can be applied in typical applications. application circuit 2 shows a pwm to dc voltage conversion circuits that can be used in linear control applications.
www.siliconstandard.com 6 of 10 ss 4003 2/01/2005 rev.1.01 pbv ppv pmv itc pev plv pcv i cv icc trickle charge cc charge cv charge finished capacity voltage thresholds in conjunction with monitoring the voltage at pin i for charge/discharge currents, the SS4003 monitors the battery potential through the pin v. the voltage potential is determined through a resistor-divider network on tips of cells. the battery voltage is obtained by measuring the input voltages on tips of cells and dividing factors stored in a rom. the cell voltages are monitored for the battery low (plv) protection, battery exhausted (pev) and charge control. as the pack voltage is lower than the plv, the SS4003 will enable the battery low control output through the batt_low pin for secondary battery pack protection. exhausting charge threshold levels are used to determine when the battery has reached a pre-programmed ?empty? state. if a validate discharge period is present, the full charge capacity will update at this point. four pre-programmed voltage thresholds, pcv, pbv, ppv and pmv, are used to determine the charge state. when the pack voltage is lower than the pcv, the charge control is in the trickle charge mode. in the trickle charge mode, the charge current is controlled at a level below 0.2c. the charge control will enter the pre-defined constant current charge mode if the pack voltage is higher than the pcv. the cell balance function activates after the pack voltage reach the pbv and keep in active state until both cells voltage are over pbv. as the pack voltage goes higher than the ppv, the charge mode transits from constant current to constant voltage charge mode. through the whole charge period, the SS4003 continues monitor the individual cell voltage and keep both cell voltages not larger than the pmv (predefined cell maximum voltage). cell balancing the SS4003 also provides the cell balance function. passive type of cell balance technologies is implemented in SS4003. the cell balance control output pin controlled the current bypass path during the charge period. the cell balance function is activate when one of the cell voltage over the pack balance start voltage (pbv). the cell balance function will turn off when both of the cell voltages are over the pbv. battery management data selections the SS4003 reserves 4 sets of battery information that can be selected by pin s1 and pin s2. if s1 and s2 inputs both are grounded, the first set will be used. the set information include: full-charge capacity (fccap), voltage at 50% of fccap, pack maximum voltage, end-discharge voltage (3% of fccap), charge taper current, charge current, and trickle- charge current etc. battery data could be sent to ssc in advance, and ssc could program the customer specified data sets.
www.siliconstandard.com 7 of 10 ss 4003 2/01/2005 rev.1.01 absolute maximum ratings power supply voltage???.vss - 0.3v to vss+6.0v storag e temperature???.. - 50 ? to 125 ? input voltage???????.vss - 0.3v to vdd+0.3v operating temperature??... - 40 ? to 85 ? d.c. characteristic ta=25 ? test conditions symbol parameter v dd conditions unit v dd operating voltage - f sys =4mhz 4.75 5 5.25 v i dd1 operating current (crystal osc) 5v no load, f sys =4mhz adc disable - 2 4 ma i dd2 operating current (rc osc)] 5v n o load, f sys =4mhz adc disable - 2.5 4 ma i stb1 standby current (wdt enabled) 5v - - - 10 a v il1 input low voltage for i/o ports, - - 0 - 0.3v dd v v ih1 input high voltage for i/o ports, - - 0.7v dd - v dd v v il2 input low voltage ( res) - - 0 - 0.4v dd v v ih2 input high voltage (res) - - 0.9v dd - v dd v v lvr low voltage reset - - 2.7 3 3.3 v i ol i/o port sink current 5v v ol =0.1v dd 10 20 - ma i oh i/o port source current 5v v ol =0.9v dd - 5 - 10 - ma v ad a/d input voltage - - 0 ? vdd v e ad a/d conversion error - - - 0.5 1 lsb i adc additional power consumption if a/d converter is used 5v - - 1.5 3 ma a.c. characteristics ta=25 ? test conditions symbol parameter conditions min. typ. unit f sys system clock - 5v - 4000 - khz t wdtosc oscillator period 5v - 32 65 130 s t res external reset low pulse width - - 1 - - s t sst system start - up timer period - wake-up from halt - 1024 ? *t sys t int interrupt pulse width - - 1 - - s max. v dd max. typ. min.
www.siliconstandard.com 8 of 10 ss 4003 2/01/2005 rev.1.01 operating frequency: 4 mhz (osc1 pin take 82k resistance to vss, 470pf capacitance to vdd , as application circuit1) application circuit 2 : r16 10k v+ d2 sks30-04at vb+ r34 3k vdd r26 56k/1% r27 56k/1% r28 470k r29 470k 3 1 2 b e c q2 mmbt2222a 3 1 2 b e c q3 mmbt2222a 1 3 2 s g d q8 1 3 2 s g d q7 vb+ vb+ 1 3 2 s g d aod403 d1 sks30-04at c12 0.1u/16v v+ r3 100k r4 27k v+ c15 22u/16v chg(r) fchg(g) r13 100k vb+ vb+ 1 2 3 j1 dc jack adin+ 1 tp5 1 tp4 1 tp7 1 tp8 1 tp9 s1 sw-spst r15 10k r36 10k r40 160r r39 160r d6 1n4148 d7 1n4148 v+ v+ out1 1 in1- 2 in1+ 3 gnd 4 in2+ 5 in2- 6 out2 7 vcc 8 u2 lm358 vdd r11 33k/1% r12 4.75k/1% r19 100k/1% r18 470r c11 1nf/16v c2 0.1u/16v r1 330k/1% r22 470k/1% r20 470k/1% 1 tp1 r31 0.05r/1%/2w c14 0.1u/16v r48 10k/open r52 10k/open vdd r49 10k/open r53 10k/open vdd r42 4.7k r46 4.7k r45 4.7k r43 4.7k r44 4.7k 1 2 d9 led 1 2 d10 led 1 2 d11 led 1 2 d12 led 1 2 d8 led vdd c9 0.01u/16v c6 0.1u/16v c7 0.1u/16v r7 100k r30 10k vdd r5 100k 3 1 2 b e c q5 mmbt2222a vdd r47 82k c8 470pf/16v vdd r41 100k r24 27k 1 tp14 1 tp11 1 tp13 1 tp12 1 tp17 1 tp18 r14 33k/1% r32 4.7k r17 100k/1% c19 47nf c18 3.3nf r25 120k/1% out1 1 in1- 2 in1+ 3 gnd 4 in2+ 5 in2- 6 out2 7 vcc 8 u4 lm358 1 2 con1 con1 c23 1u led3 1 led2 2 pdc 3 batt_low 4 cled 5 cfled 6 led1 7 i 8 v2 9 v1 10 vss 11 adj1 12 adj2 13 cctl 14 res 15 vdd 16 osc1 17 osc2 18 s1 19 s2 20 dispsel 21 extpwr 22 led5 23 led4 24 u1 SS4003 c1 4.7u/16v 3 1 2 v v gnd in out q10 c20 1u r2 100k r6 1m/open 1 3 2 s g d q4 c13 4.7u/16v 1 vb+ 1 vm 1 vb- vb- 1 tp3 1 tp2 1 tp10 f1 fuse s1 1 g1 2 s2 3 g2 4 d4 5 d3 6 d2 7 d1 8 u7 r21 1k/5% r8 4.7m/5% r35 1k c3 0.1u/16v c5 0.22u/16v c4 0.22u/16v r38 1k/5% r37 1k/5% sens 1 do 2 co 3 vm 4 vss 5 ict 6 vc 7 vcc 8 u3 s-8232auft rsens 1 tp15 1 tp16 r9 160r r10 160r vm 1 2 d4 led-r 1 2 d3 led-g r50 1m 3 1 2 b e c q1 mmbt2222a 3 1 2 b e c q6 mmbt2222a vb+ vb- r23 10k r33 100k battlow battlow battlow battlow 1 tp6 pdc pdc led display led1 ~ led5 fsys / 4 osc2 SS4003 application circuit 1 : vdd osc1 470 pf 82ko vdd 100k o 10ko 0.1uf res 0.01uf 0.1uf
www.siliconstandard.com 9 of 10 ss 4003 2/01/2005 rev.1.01 0.10mm c seating plane package dimensions: h g ? b a c 1 c e f d min. nom. max. a 394 - 419 b 290 - 300 c 14 - 20 c1 590 - 614 d 92 - 104 e - 50 - f 4 - - g 32 - 38 h 4 - 12 ? 0 - 10 symbol dimensioninmil so-24
information furnished by silicon standard corporation is believed to be accurate and reliable. however, silicon standard corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. silicon standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. no license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of silicon standard corporation or any third parties. www.siliconstandard.com 10 of 10 ss 4003 2/01/2005 rev.1.01 0.10mm c seating plane ssop-24 h g ? b a c 1 c e f d min. nom. max. a 228 - 244 b 150 - 157 c 8 - 12 c1 335 - 346 d 54 - 60 e - 25 - f 4 - 10 g 22 - 28 h 7 - 10 ? 0 - 8 symbol dimensioninmil
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